The present invention relates to a lithographic technique and more specifically to a method of electrically measuring misregistration used in measuring misregistration errors.
Conventionally, the misregistration of exposure processes for fabricating semiconductor devices is measured in terms of electrical resistance values of a pattern for measuring the amount of misregistration.
For example, in the paper entitled "Automatic Testing and Analysis of Misregistrations Found in Semiconductor Processing" by I. J. STEMP, K. H. NICHOLAS, and H. E. BLOCKMAN, IEEE TRANSACTIONS ON ELECTRON DEVICES, Vol. ED-26. No. 4, pp. 729 to 732, April 1979, it is concluded that the misregistration measurement precision is 20 nm and this precision will suffice.
However, taking into consideration the design of recent semiconductor devices, the measurement precision needs to be at least 5 nm. For semiconductor devices of the future, the measurement precision will need to be 1 nm. Therefore, there is a need for some idea that allows for measurements at precision higher than the present level.
The aforementioned technique expects an improvement in measurement precision through resistance measurement based on four-point measurements; however, no four-point measurement is actually used and no measurement pattern is presented.
Due to the aberration of the projection optical system, the pattern will shift its transferred location according to its density level. In the aforementioned technique, an isolated pattern is used to measure an amount of misregistration and its density differs from that of an actual device pattern. For this reason, the measured value will not be trustworthy.